[mlir][gpu] Move async copy ops to NVGPU and add caching hints
authorThomas Raoux <thomasraoux@google.com>
Mon, 9 May 2022 17:18:21 +0000 (17:18 +0000)
committerThomas Raoux <thomasraoux@google.com>
Tue, 10 May 2022 22:30:24 +0000 (22:30 +0000)
commit15bcc36eede13b24470e554dfa932f1fc40dd4ba
tree8f77c0a55b7713ae90ed1035d480462d8b610d78
parent71bcead98b2e655031208e5ad0ce89f8971a6343
[mlir][gpu] Move async copy ops to NVGPU and add caching hints

Move async copy operations to NVGPU as they only exist on NV target and are
designed to match ptx semantic. This allows us to also add more fine grain
caching hint attribute to the op.
Add hint to bypass L1 and hook it up to NVVM op.

Differential Revision: https://reviews.llvm.org/D125244
19 files changed:
mlir/include/mlir/Dialect/GPU/GPUBase.td
mlir/include/mlir/Dialect/GPU/GPUDialect.h
mlir/include/mlir/Dialect/GPU/GPUOps.td
mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
mlir/include/mlir/Dialect/NVGPU/NVGPU.td
mlir/include/mlir/Dialect/NVGPU/NVGPUDialect.h
mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
mlir/lib/Conversion/NVGPUToNVVM/CMakeLists.txt
mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
mlir/lib/Dialect/NVGPU/IR/CMakeLists.txt
mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir [moved from mlir/test/Conversion/NVGPUToNVVM/mma-sync-to-nvvm.mlir with 81% similarity]
mlir/test/Dialect/GPU/invalid.mlir
mlir/test/Dialect/GPU/ops.mlir
mlir/test/Dialect/NVGPU/invalid.mlir [new file with mode: 0644]
mlir/test/Dialect/NVGPU/roundtrip.mlir
utils/bazel/llvm-project-overlay/mlir/BUILD.bazel