arm64: erratum: Work around Falkor erratum #E1003 in trampoline code
authorWill Deacon <will.deacon@arm.com>
Tue, 14 Nov 2017 14:29:19 +0000 (14:29 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 16 Feb 2018 19:22:48 +0000 (20:22 +0100)
commit15a511c0cbd1b1c8f800ce8c8921fb2390fb2d05
tree075b28892f957015c30399229c1868f4c874f4a4
parent6472f1a3a54f061864a5091788778793661aa7c0
arm64: erratum: Work around Falkor erratum #E1003 in trampoline code

Commit d1777e686ad1 upstream.

We rely on an atomic swizzling of TTBR1 when transitioning from the entry
trampoline to the kernel proper on an exception. We can't rely on this
atomicity in the face of Falkor erratum #E1003, so on affected cores we
can issue a TLB invalidation to invalidate the walk cache prior to
jumping into the kernel. There is still the possibility of a TLB conflict
here due to conflicting walk cache entries prior to the invalidation, but
this doesn't appear to be the case on these CPUs in practice.

Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Tested-by: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm64/Kconfig
arch/arm64/kernel/entry.S