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r600g: Don't set the dest cache bits on surface sync for R600_CONTEXT_FLUSH_AND_INV 00/6400/1
authorTom Stellard <thomas.stellard@amd.com>
Fri, 26 Apr 2013 17:21:06 +0000 (13:21 -0400)
committerTom Stellard <thomas.stellard@amd.com>
Thu, 2 May 2013 16:00:37 +0000 (09:00 -0700)
commit156bcca62c9f4e79e78929f72bc085757f36a65a
treeeece80cb5cf1cb548ce3c2a0fade471320d01ce9tree | snapshot
parent5752be0cb78c2a2e30b88eaf8addc173ae483e9ecommit | diff
r600g: Don't set the dest cache bits on surface sync for R600_CONTEXT_FLUSH_AND_INV

We are already emitting a EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT packet
when this flush flag is set, so flushing the dest caches with a
SURFACE_SYNC should not be necessary.

The motivation for this change is that emitting a SURFACE_SYNC packet with
the CB bits set was causing compute shaders to hang on Cayman.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
src/gallium/drivers/r600/r600_hw_context.c diff | blob | history
Domain: Graphics System / GL;