pinctrl: sh-pfc: r8a7796: Fix IPSR setting for MSIOF3_SS1_E pin
authorTakeshi Kihara <takeshi.kihara.df@renesas.com>
Thu, 1 Jun 2017 13:25:30 +0000 (22:25 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 17 Jul 2017 08:51:32 +0000 (10:51 +0200)
commit1554b989e58c8e5327da5391ea66b6b166f09d8e
treecfbe3c22dbe0a8dce7df1cfb20d9dd94ead0699d
parent70070190871f831ceb46cce6c2b9a1038d1802cf
pinctrl: sh-pfc: r8a7796: Fix IPSR setting for MSIOF3_SS1_E pin

This patch fixes the IPSR register setting when the MSIOF3_SS1_E pin
function is selected.

This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: f9aece7344bd81ce ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Reword]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/sh-pfc/pfc-r8a7796.c