[AArch64] Improve single vector lane stores
authorEvandro Menezes <e.menezes@samsung.com>
Mon, 14 May 2018 15:26:35 +0000 (15:26 +0000)
committerEvandro Menezes <e.menezes@samsung.com>
Mon, 14 May 2018 15:26:35 +0000 (15:26 +0000)
commit14fa2e4fa5523d0428549c60cb9b8829e0e0e776
tree88f43f11bec249c168e269b36f78fc46565a8382
parent58b54894c7b66a565e9dcf5236ff1425ab8053dc
[AArch64] Improve single vector lane stores

When storing the 0th lane of a vector, use a simpler and usually more efficient scalar store instead.

Differential revision: https://reviews.llvm.org/D46655

llvm-svn: 332251
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
llvm/test/CodeGen/AArch64/arm64-neon-simd-ldst-one.ll
llvm/test/CodeGen/AArch64/arm64-st1.ll
llvm/test/CodeGen/AArch64/fp16-vector-load-store.ll