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(parent: 4b32431) | patch
intel/fs/xe2+: Update TES payload setup for Xe2 reg size.
authorFrancisco Jerez <currojerez@riseup.net>
Wed, 7 Sep 2022 21:11:05 +0000 (14:11 -0700)
committerJordan Justen <jordan.l.justen@intel.com>
Thu, 21 Sep 2023 00:19:36 +0000 (17:19 -0700)
commit14e1b9ee69b20a375baa6d9a360a92a84b90dd0a
tree8c84bc55777c37c8f322fd2b2f5a813496527819tree | snapshot
parent4b3243104cd639bbf67a7a68051b5ed35dad50e3commit | diff
intel/fs/xe2+: Update TES payload setup for Xe2 reg size.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25020>
src/intel/compiler/brw_fs.cpp diff | blob | history
src/intel/compiler/brw_fs.h diff | blob | history
src/intel/compiler/brw_fs_thread_payload.cpp diff | blob | history
Domain: Graphics System / GL;