PCI: dwc: Log link speed and width if it comes up
authorSerge Semin <Sergey.Semin@baikalelectronics.ru>
Fri, 24 Jun 2022 14:39:33 +0000 (17:39 +0300)
committerBjorn Helgaas <bhelgaas@google.com>
Mon, 1 Aug 2022 20:01:25 +0000 (15:01 -0500)
commit14c4ad125cf94ba226556dd5cffbd00c6482c6bd
treea3e359ebf4f5dfabbee1f10fa11fa557f7e47c07
parent7659806aded90bbfdc8f31fc858bc661da5a2840
PCI: dwc: Log link speed and width if it comes up

Printing just "link up" isn't very informative for PCI Express. Even if the
link is up, bus performance can degrade to slower speeds or to narrower
width than both Root Port and its partner is capable of. In that case it
would be handy to know the link specifications as early as possible.

If the link comes up, log the link speed (PCIe generation) and width.

Link: https://lore.kernel.org/r/20220624143947.8991-2-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
drivers/pci/controller/dwc/pcie-designware.c