drm/i915: Sanitize PHY state during display core uninit
authorImre Deak <imre.deak@intel.com>
Fri, 16 Aug 2019 09:55:23 +0000 (12:55 +0300)
committerImre Deak <imre.deak@intel.com>
Tue, 20 Aug 2019 13:17:55 +0000 (16:17 +0300)
commit149d6deb880c3a9002161bb6f978bc81c7c1ca8e
tree7b23223fb5075eb7f9fdb72d2e2a24095c70b8b0
parent2969a78aead38b49e80c821a5c683544ab16160d
drm/i915: Sanitize PHY state during display core uninit

To work around a DMC/Punit issue on ICL where the driver's
ICL_PORT_COMP_DW8/IREFGEN PHY setting is lost when entering/exiting DC6
state, make sure to reinit the PHY whenever disabling DC states.
Similarly the driver's PHY/DBUF/CDCLK settings should have been preserved
across DC5/6 transitions, so check this on all platforms.

This gets rid of the following WARN during suspend:
Combo PHY A HW state changed unexpectedly

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190816095523.15800-1-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_display_power.c