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author	Nikita Popov <npopov@redhat.com>
	Mon, 19 Dec 2022 12:00:01 +0000 (13:00 +0100)
committer	Nikita Popov <npopov@redhat.com>
	Mon, 19 Dec 2022 12:01:08 +0000 (13:01 +0100)
commit	1456b68686808fa7c6ed7327aba65b639f81d5b8
tree	e5f8f5ac7a8fb1a165f6bc12f66e0cc782b4ec31	tree \| snapshot
parent	705029ace883f2842a6cb5942b737b815b37ded4	commit \| diff

[RISCV] Convert some tests to opaque pointers (NFC)

251 files changed:

llvm/test/CodeGen/RISCV/add-imm.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/addrspacecast.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/alloca.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/alu16.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/alu8.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/arith-with-overflow.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/atomic-cmpxchg-flag.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/atomic-load-store.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/atomic-rmw.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/atomic-signext.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/blockaddress.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/branch.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/byval.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/callee-saved-gprs.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/calls.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/cmp-bool.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/codemodel-lowering.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/compress-float.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/compress-inline-asm.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/compress.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/disjoint.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/double-convert-strict.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/double-convert.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/double-mem.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/dwarf-eh.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/eh-dwarf-cfa.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/elf-preemption.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/exception-pointer-register.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/fixups-diff.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/fixups-relax-diff.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/float-convert-strict.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/float-convert.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/float-mem.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/fp-imm.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/fp128.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/fp16-promote.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/frame-info.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/frame.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/frameaddr-returnaddr.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/get-setcc-result-type.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/ghccc-rv32.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/ghccc-rv64.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/half-convert-strict.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/half-convert.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/half-mem.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/hwasan-check-memaccess.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/imm-cse.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/imm.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/indirectbr.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/init-array.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/inline-asm-S-constraint.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/inline-asm-d-constraint-f.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/inline-asm-f-constraint-f.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/inline-asm-zfh-constraint-f.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/inline-asm.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/interrupt-attr-callee.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/interrupt-attr.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/isel-optnone.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/jumptable.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/large-stack.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/legalize-fneg.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/libcall-tail-calls.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/loop-strength-reduce-add-cheaper-than-mul.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/lsr-legaladdimm.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/machine-cse.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/machine-outliner-throw.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/machinelicm-address-pseudos.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/macro-fusion-lui-addi.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/mem.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/mem64.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/memcpy-inline.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/mir-target-flags.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/musttail-call.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/neg-abs.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/option-nopic.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/option-pic.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/optnone-store-no-combine.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/overflow-intrinsic-optimizations.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/pic-models.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/pr51206.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/pr58025.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/pr58286.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/prefetch.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/remat.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/reserved-regs.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rv32zba.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rv64-large-stack.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rv64i-shift-sext.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rv64zba.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rv64zbb-zbkb.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rv64zbb.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rv64zbs.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/combine-store-fp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/constant-folding-crash.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vector-segN-load.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-negative.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extload-truncstore.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i-sat.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-exttrunc.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-vrgather.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-load-store.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-peephole-vmerge-vops.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store-merge-crash.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpstore.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll		diff \| blob \| history
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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll		diff \| blob \| history
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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll		diff \| blob \| history
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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vw-web-simplification.ll		diff \| blob \| history
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llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll		diff \| blob \| history
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llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll		diff \| blob \| history
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