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(parent: 767b115) | patch
GBE: move the image info register allocation to GEN IR stage.
authorZhigang Gong <zhigang.gong@intel.com>
Thu, 16 Jan 2014 03:56:15 +0000 (11:56 +0800)
committerZhigang Gong <zhigang.gong@intel.com>
Fri, 17 Jan 2014 06:27:46 +0000 (14:27 +0800)
commit142a45e602c612d0c7c73806c8038da7c56b9ac0
tree0f1bffc4e4fc7e663b59e14d4d471d9184ac592dtree | snapshot
parent767b115b0f4e8168fc0a086837f9a50aefeb5fa4commit | diff
GBE: move the image info register allocation to GEN IR stage.

If we allocate image infor register at code generation stage,
we miss the liveness calculation. Thus there is a potential risk
that some image information register's livenss data is incorrect and
may cause very subtle bug. Now fix it.

Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
Reviewed-by: "Yang, Rong R" <rong.r.yang@intel.com>
backend/src/backend/context.cpp diff | blob | history
backend/src/backend/gen_context.cpp diff | blob | history
backend/src/backend/gen_insn_gen7_schedule_info.hxx diff | blob | history
backend/src/backend/gen_insn_selection.hxx diff | blob | history
backend/src/backend/gen_reg_allocation.cpp diff | blob | history
backend/src/ir/image.cpp diff | blob | history
backend/src/ir/image.hpp diff | blob | history
backend/src/ir/instruction.hpp diff | blob | history
backend/src/llvm/llvm_gen_backend.cpp diff | blob | history
Domain: SCM / Uncategorized;