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(parent: 529e256) | patch
drm/exynos/hdmi: fix PLL for 27MHz settings
authorAndrzej Hajda <a.hajda@samsung.com>
Mon, 12 Dec 2016 13:18:26 +0000 (14:18 +0100)
committerSeung-Woo Kim <sw0312.kim@samsung.com>
Wed, 14 Dec 2016 04:54:35 +0000 (13:54 +0900)
commit141d04287de37ac7f6827577db839bf7f34f0ec1
tree3f94f4bf7a03308002ab272a1472b756fdfe7cb1tree | snapshot
parent529e2563be6f371b31ad0c1742f688359c997d54commit | diff
drm/exynos/hdmi: fix PLL for 27MHz settings

Current settings for 27MHz and 27.027MHz do not work. Use the settings from
vendor code instead.

Change-Id: I701555eff3fca430736664e0f628fc50d9a6dc4f
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
drivers/gpu/drm/exynos/exynos_hdmi.c diff | blob | history
Domain: System / Kernel;