i386: Fix up *<dwi>3_doubleword_mask [PR105911]
authorJakub Jelinek <jakub@redhat.com>
Mon, 13 Jun 2022 08:53:33 +0000 (10:53 +0200)
committerJakub Jelinek <jakub@redhat.com>
Mon, 13 Jun 2022 08:54:22 +0000 (10:54 +0200)
commit13ea4a6e830da1f245136601e636dec62e74d1a7
tree8dfbe312aedc9df5e5eca2ff5a47c14d091282bd
parent033e5ee3c4a2c841ff24e3bf3fc5324ea9cc373c
i386: Fix up *<dwi>3_doubleword_mask [PR105911]

Another regression caused by my recent patch.

This time because define_insn_and_split only requires that the
constant mask is const_int_operand.  When it was only SImode,
that wasn't a problem, HImode neither, but for DImode if we need
to and the shift count we might run into a problem that it isn't
a representable signed 32-bit immediate.

But, we don't really care about the upper bits of the mask, so
we can just mask the CONST_INT with the mode mask.

2022-06-13  Jakub Jelinek  <jakub@redhat.com>

PR target/105911
* config/i386/i386.md (*ashl<dwi>3_doubleword_mask,
*<insn><dwi>3_doubleword_mask): Use operands[3] masked with
(<MODE_SIZE> * BITS_PER_UNIT) - 1 as AND operand instead of
operands[3] unmodified.

* gcc.dg/pr105911.c: New test.
gcc/config/i386/i386.md
gcc/testsuite/gcc.dg/pr105911.c [new file with mode: 0644]