[FastISel] Permit instructions to be skipped for FastISel generation.
authorSimon Dardis <simon.dardis@mips.com>
Tue, 22 May 2018 14:36:58 +0000 (14:36 +0000)
committerSimon Dardis <simon.dardis@mips.com>
Tue, 22 May 2018 14:36:58 +0000 (14:36 +0000)
commit13de555737e07b29d126ed72d8450f88bd38f66c
tree515d1f11102597b3fc6e503635998d14c847c490
parent8a60e5db701ed04926e120142dbb7bdb0528010a
[FastISel] Permit instructions to be skipped for FastISel generation.

Some ISA's such as microMIPS32(R6) have instructions which are near identical
for code generation purposes, e.g. xor and xor16. These instructions take the
same value types for operands and return values, have the same
instruction predicates and map to the same ISD opcode. (These instructions do
differ by register classes.)

In such cases, the FastISel generator rejects the instruction definition.

This patch borrows the 'FastIselShouldIgnore' bit from rL129692 and enables
applying it to an instruction definition.

Reviewers: mcrosier

Differential Revision: https://reviews.llvm.org/D46953

llvm-svn: 332983
llvm/include/llvm/Target/Target.td
llvm/test/TableGen/FastISelEmitter.td [new file with mode: 0644]
llvm/utils/TableGen/CodeGenInstruction.cpp
llvm/utils/TableGen/CodeGenInstruction.h
llvm/utils/TableGen/FastISelEmitter.cpp