clk: at91: rework rm9200 USB clock to propagate set_rate to the parent clk
authorBoris BREZILLON <boris.brezillon@free-electrons.com>
Tue, 2 Sep 2014 07:50:17 +0000 (09:50 +0200)
committerMike Turquette <mturquette@linaro.org>
Tue, 2 Sep 2014 22:37:22 +0000 (15:37 -0700)
commit13a6073d4c5db3103011eebe8c68b049323ced20
treea9e2dee2d3c352d77e7275b28d853eca06fb13ab
parent87e2ed338f1b56798807ccf12eb6112d25062202
clk: at91: rework rm9200 USB clock to propagate set_rate to the parent clk

The RM9200 USB clock is actually connected to a single parent (the PLLB)
on which we can apply a specific divider.
The USB clock divider does not allow for fine grained control on the USB
clock frequency, hence propagating the set_rate request to the parent is
the only choice we have to properly configure the USB clock rate.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Reported-by: Gaël PORTAY <gael.portay@gmail.com>
Tested-by: Gaël PORTAY <gael.portay@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/at91/clk-usb.c