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(parent: 71a1c2c) | patch
RISC-V: Add vssrl.vv C API tests
authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>
Fri, 10 Feb 2023 06:26:07 +0000 (14:26 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Sun, 12 Feb 2023 10:31:41 +0000 (18:31 +0800)
commit13907f4bd2eba88229c83bef3daee13734df83b0
treec7fd948cfb45965b0795871a1580275174d93720tree | snapshot
parent71a1c2c67aa13ae59eef8f2b37fd364d1d18916ecommit | diff
RISC-V: Add vssrl.vv C API tests

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vssrl_vv-1.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv-2.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv-3.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_m-1.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_m-2.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_m-3.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vssrl_vv_tumu-3.c: New test.
18 files changed:
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_m-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_m-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_m-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_mu-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_mu-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_mu-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_tu-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_tu-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_tu-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_tum-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_tum-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_tum-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_tumu-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_tumu-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssrl_vv_tumu-3.c [new file with mode: 0644] blob
Domain: System / Toolchain;