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(parent: 2157f5c) | patch
RDMA/irdma: Add 2 level PBLE support for FMR
authorMustafa Ismail <mustafa.ismail@intel.com>
Tue, 5 Jul 2022 23:08:09 +0000 (18:08 -0500)
committerLeon Romanovsky <leonro@nvidia.com>
Mon, 18 Jul 2022 07:39:28 +0000 (10:39 +0300)
commit137d264c6f63f5b57200b8becb00d7cc58163c05
tree1d6a2413d77d7f84d1f2b381ae5d04daa2916be8tree | snapshot
parent2157f5caaed59128d70a1dd72f5ec809cad54407commit | diff
RDMA/irdma: Add 2 level PBLE support for FMR

Level 2 Physical Buffer List Entry (PBLE) is currently not supported for
Fast MRs which limits memory registrations to 256K pages.

Adapt irdma_set_page and irdma_alloc_mr to allow for 2 level PBLEs.

Link: https://lore.kernel.org/r/20220705230815.265-2-shiraz.saleem@intel.com
Signed-off-by: Mustafa Ismail <mustafa.ismail@intel.com>
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
drivers/infiniband/hw/irdma/main.h diff | blob | history
drivers/infiniband/hw/irdma/verbs.c diff | blob | history
Domain: System / Kernel;