[AArch64] Modeling NZCV read/write for MOPS instructions

[AArch64] Modeling NZCV read/write for MOPS instructions

According to the specification, MOPS instructions define/use NZCV flags as
part of their semantics (see discussion in
https://reviews.llvm.org/D116157).

More specifically, the specification of the MOPS extension states that
each memcpy/memset/memmov operation will be performed by a series
of three MOPS instructions P, M and E. The P instruction writes to the
NZCV flags, while the others (M and E) reads from the NZCV flags.

This is part 2/4 of a series of patches split from
https://reviews.llvm.org/D117405 to facilitate reviewing.

Differential Revision: https://reviews.llvm.org/D117757