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(parent: e512c50) | patch
powerpc/mpc85xx: Add workaround for erratum A006379
authorYork Sun <yorksun@freescale.com>
Mon, 16 Sep 2013 19:49:31 +0000 (12:49 -0700)
committerYork Sun <yorksun@freescale.com>
Wed, 16 Oct 2013 23:15:17 +0000 (16:15 -0700)
commit133fbfa9e6a81a59ab2d6848f0b111ebb2567a8a
tree8310923265a2fd56d900bc4b973cfbb2f95dfc75tree | snapshot
parente512c50bc9e3ef0bcf209620cabfc6ef35f22ff3commit | diff
powerpc/mpc85xx: Add workaround for erratum A006379

Erratum A006379 says CPCHDBCR0 bit field [10:14] has incorrect default
value after POR. The workaround is to set this field before enabling
CPC to 0x1e.

Erratum A006379 applies to
T4240 rev 1.0
B4860 rev 1.0, 2.0

Signed-off-by: York Sun <yorksun@freescale.com>
arch/powerpc/cpu/mpc85xx/cmd_errata.c diff | blob | history
arch/powerpc/cpu/mpc85xx/cpu_init.c diff | blob | history
arch/powerpc/include/asm/config_mpc85xx.h diff | blob | history
arch/powerpc/include/asm/fsl_errata.h [new file with mode: 0644] blob
arch/powerpc/include/asm/immap_85xx.h diff | blob | history
Domain: System / Kernel;