net/mlx5: Fix PPLM register mapping
authorAya Levin <ayal@nvidia.com>
Sun, 4 Apr 2021 07:50:50 +0000 (10:50 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 14 Apr 2021 06:42:11 +0000 (08:42 +0200)
commit1312f11eb33de7014b36551dc415be22553be66c
tree00052cb40f758016ece1a9d8469e26d20b7db3f8
parentf92faf0bdd25897bf6f041939d4beada1ff758e3
net/mlx5: Fix PPLM register mapping

[ Upstream commit ce28f0fd670ddffcd564ce7119bdefbaf08f02d3 ]

Add reserved mapping to cover all the register in order to avoid
setting arbitrary values to newer FW which implements the reserved
fields.

Fixes: a58837f52d43 ("net/mlx5e: Expose FEC feilds and related capability bit")
Signed-off-by: Aya Levin <ayal@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
include/linux/mlx5/mlx5_ifc.h