drm/i915: possibly invalidate TLB before context switch
authorBen Widawsky <ben@bwidawsk.net>
Mon, 4 Jun 2012 21:42:50 +0000 (14:42 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 14 Jun 2012 15:36:19 +0000 (17:36 +0200)
commit12b0286f49947a6cdc9285032d918466a8c3f5f9
tree7fa02ef380f2260b2c5eae769b6ac8c40e7d92b2
parentcc0f6398225ffd2b890ff83eafe212b1ae863cad
drm/i915: possibly invalidate TLB before context switch

From http://intellinuxgraphics.org/documentation/SNB/IHD_OS_Vol1_Part3.pdf

[DevSNB] If Flush TLB invalidation Mode is enabled it's the driver's
responsibility to invalidate the TLBs at least once after the previous
context switch after any GTT mappings changed (including new GTT
entries).  This can be done by a pipelined PIPE_CONTROL with TLB inv bit
set immediately before MI_SET_CONTEXT.

On GEN7 the invalidation mode is explicitly set, but this appears to be
lacking for GEN6. Since I don't know the history on this, I've decided
to dynamically read the value at ring init time, and use that value
throughout.

v2: better comment (daniel)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
drivers/gpu/drm/i915/i915_gem_context.c
drivers/gpu/drm/i915/intel_ringbuffer.c
drivers/gpu/drm/i915/intel_ringbuffer.h