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author	David Sherwood <david.sherwood@arm.com>
	Thu, 3 Nov 2022 11:25:41 +0000 (11:25 +0000)
committer	David Sherwood <david.sherwood@arm.com>
	Mon, 7 Nov 2022 14:38:28 +0000 (14:38 +0000)
commit	12a6572d41f195a5765b49322b46b246c30759fc
tree	1a79ff12b5423127d891853c236c1626383bd590	tree \| snapshot
parent	9a45e4beede24fdcd6b7d95416d0447ba154651c	commit \| diff

[AArch64] Add SME2.1 target feature for Armv9-A 2022 Architecture Extension

First patch in a series adding MC layer support for SME2.1.

This patch adds the following feature:

sme2p1

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09

Differential Revision: https://reviews.llvm.org/D137410

51 files changed:

llvm/include/llvm/Support/AArch64TargetParser.def		diff \| blob \| history
llvm/include/llvm/Support/AArch64TargetParser.h		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64.td		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64InstrInfo.td		diff \| blob \| history
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp		diff \| blob \| history
llvm/test/MC/AArch64/SME2p1/directive-arch-negative.s	[new file with mode: 0644]	blob
llvm/test/MC/AArch64/SME2p1/directive-arch.s	[new file with mode: 0644]	blob
llvm/test/MC/AArch64/SME2p1/directive-arch_extension-negative.s	[new file with mode: 0644]	blob
llvm/test/MC/AArch64/SME2p1/directive-arch_extension.s	[new file with mode: 0644]	blob
llvm/test/MC/AArch64/SVE2p1/bfmlslb.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/bfmlslt.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/cntp.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/fclamp.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/fdot.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/ld1b.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/ld1d.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/ld1h.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/ld1q.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/ld1w.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/ldnt1b.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/ldnt1d.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/ldnt1h.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/ldnt1w.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/pext.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/ptrue.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/sdot.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/sqcvtn.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/sqcvtun.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/sqrshrn.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/sqrshrun.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/st1b.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/st1d.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/st1h.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/st1q.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/st1w.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/stnt1b.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/stnt1d.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/stnt1h.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/stnt1w.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/udot.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/uqcvtn.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/uqrshrn.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/whilege.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/whilegt.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/whilehi.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/whilehs.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/whilele.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/whilelo.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/whilels.s		diff \| blob \| history
llvm/test/MC/AArch64/SVE2p1/whilelt.s		diff \| blob \| history
llvm/unittests/Support/TargetParserTest.cpp		diff \| blob \| history

Domain: System / Toolchain;

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