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mailbox: qcom-apcs-ipc: add IPQ5332 APSS clock support
authorKathiravan T <quic_kathirav@quicinc.com>
Thu, 2 Feb 2023 14:52:07 +0000 (20:22 +0530)
committerJassi Brar <jaswinder.singh@linaro.org>
Thu, 23 Feb 2023 20:47:13 +0000 (14:47 -0600)
commit1261a6626a08071b7c9fa3025deb569c91eb55ae
tree0571e269138b87b465300973f9179a5251993f25tree | snapshot
parentdf4c17aa3ea0a8128747f5234b06d7375642f9dbcommit | diff
mailbox: qcom-apcs-ipc: add IPQ5332 APSS clock support

IPQ5332 has the APSS clock controller utilizing the same register space
as the APCS, so provide access to the APSS utilizing a child device like
other IPQ chipsets.

Like IPQ6018, the same controller and driver is used, so utilize IPQ6018
match data for IPQ5332.

Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
drivers/mailbox/qcom-apcs-ipc-mailbox.c diff | blob | history
Domain: System / Kernel;