intel/compiler: add new half-float register type for 3-src instructions
authorIago Toral Quiroga <itoral@igalia.com>
Mon, 21 May 2018 12:42:42 +0000 (14:42 +0200)
committerJuan A. Suarez Romero <jasuarez@igalia.com>
Thu, 18 Apr 2019 09:05:18 +0000 (11:05 +0200)
commit120c970619cd876a256f788afe2a79a92f8cd7ab
tree313d5ad6a5f9db5294e86ac83dc0c35d36d8f9f7
parent4ab2b97a8fbc8fb07534ec92c9c5326889af290f
intel/compiler: add new half-float register type for 3-src instructions

This is available since gen8.

v2: restore previously existing assertion.

v3: don't use separate tables for gen7 and gen8, just assert that we
    don't use half-float before gen8 (Matt)

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (v1)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
src/intel/compiler/brw_reg_type.c