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(parent: 96403c1) | patch
intel/eu: Set scope to TILE for TGM flushes
authorJason Ekstrand <jason@jlekstrand.net>
Mon, 9 Aug 2021 22:23:52 +0000 (17:23 -0500)
committerMarge Bot <eric+marge@anholt.net>
Tue, 10 Aug 2021 14:00:19 +0000 (14:00 +0000)
commit11ac7d9e0254d7b6cf564df89867d6973830b6ff
treebc52ac486aac5465163155769876ef9f1d8fab57tree | snapshot
parent96403c1ec4ab14f65cdbda30adb4b6caa1071db0commit | diff
intel/eu: Set scope to TILE for TGM flushes

Setting it to GPU can cause an L3$ flush in certain cases.  That's not
what we want as we really only care about coherency within the GPU.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Sagar Ghuge <sagar@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12291>
src/intel/compiler/brw_eu_emit.c diff | blob | history
Domain: Graphics System / GL;