arm: cache: Implement cache range check for v7
authorMarek Vasut <marex@denx.de>
Mon, 27 Jul 2015 20:34:17 +0000 (22:34 +0200)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sun, 31 Jan 2016 15:32:56 +0000 (16:32 +0100)
commit11aa6a32eb5f38dd670342072b9e885269013d62
treecac2ee59928935441baf617c43fb312c7347297f
parent3709844f2366cd75eacee1deeedadaa507ddc9a1
arm: cache: Implement cache range check for v7

Add code to aid tracking down cache alignment issues.
In case DEBUG is defined in the cache.c, this code will
check alignment of each attempt to flush/invalidate data
cache and print a warning if the alignment is incorrect.
If DEBUG is not defined, this code is optimized out.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@konsulko.com>
arch/arm/cpu/armv7/cache_v7.c