GlobalISel: use G_TYPE to annotate physregs with a type.
authorTim Northover <tnorthover@apple.com>
Wed, 31 Aug 2016 21:24:02 +0000 (21:24 +0000)
committerTim Northover <tnorthover@apple.com>
Wed, 31 Aug 2016 21:24:02 +0000 (21:24 +0000)
commit11a235467088c800fe0a7323cb18a55fe9fe0cd3
treeb8a59758a42fd6d569adfd9b48779a935c3337fe
parent7caf48cc5bd762a1a5a363c73ec31184cf89e9bc
GlobalISel: use G_TYPE to annotate physregs with a type.

More preparation for dropping source types from MachineInstrs: regsters coming
out of already-selected code (i.e. non-generic instructions) don't have a type,
but that information is needed so we must add it manually.

This is done via a new G_TYPE instruction.

llvm-svn: 280292
36 files changed:
llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
llvm/include/llvm/Target/GenericOpcodes.td
llvm/include/llvm/Target/TargetOpcodes.def
llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp
llvm/lib/CodeGen/GlobalISel/MachineLegalizer.cpp
llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
llvm/lib/CodeGen/MachineVerifier.cpp
llvm/lib/Target/AArch64/AArch64CallLowering.cpp
llvm/lib/Target/AArch64/AArch64CallLowering.h
llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll
llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir
llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-ignore-non-generic.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
llvm/test/CodeGen/AArch64/GlobalISel/verify-regbankselected.mir
llvm/test/CodeGen/AArch64/GlobalISel/verify-selected.mir
llvm/test/CodeGen/X86/xray-multiplerets-in-blocks.mir