drm/amd/display: Fix MPCC 1DLUT programming
authorIlya Bakoulin <ilya.bakoulin@amd.com>
Tue, 7 Nov 2023 20:07:56 +0000 (15:07 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 8 Dec 2023 07:52:25 +0000 (08:52 +0100)
commit117917b0be2e9bc893859a70cfff17e48020ada8
treebbb3d865949ff866757d9ea89832b5ec4998bb0e
parentd05614ebad8c2eff20f40ca1f55e36a76d4b0dd8
drm/amd/display: Fix MPCC 1DLUT programming

[ Upstream commit 6f395cebdd8927fbffdc3a55a14fcacf93634359 ]

[Why]
Wrong function is used to translate LUT values to HW format, leading to
visible artifacting in some cases.

[How]
Use the correct cm3_helper function.

Cc: stable@vger.kernel.org # 6.1+
Reviewed-by: Krunoslav Kovac <krunoslav.kovac@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Ilya Bakoulin <ilya.bakoulin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c