review.tizen.org Git - platform/upstream/llvm.git/commit

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author	Mehdi Amini <mehdi.amini@apple.com>
	Sat, 1 Oct 2016 02:56:57 +0000 (02:56 +0000)
committer	Mehdi Amini <mehdi.amini@apple.com>
	Sat, 1 Oct 2016 02:56:57 +0000 (02:56 +0000)
commit	117296c0a00860072854dd3fee8cd710b7955cf7
tree	8607cdf84f087928e123b023d511a39d99e088e6	tree \| snapshot
parent	86eeda8e20d5aa5a5622a487c56364b4b26c6f3a	commit \| diff

Use StringRef in Pass/PassManager APIs (NFC)

llvm-svn: 283004

217 files changed:

clang/lib/CodeGen/CodeGenAction.cpp		diff \| blob \| history
llvm/include/llvm/Analysis/LoopPass.h		diff \| blob \| history
llvm/include/llvm/Analysis/RegionPass.h		diff \| blob \| history
llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h		diff \| blob \| history
llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h		diff \| blob \| history
llvm/include/llvm/CodeGen/GlobalISel/MachineLegalizePass.h		diff \| blob \| history
llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h		diff \| blob \| history
llvm/include/llvm/IR/DiagnosticInfo.h		diff \| blob \| history
llvm/include/llvm/IR/LegacyPassManagers.h		diff \| blob \| history
llvm/include/llvm/IR/LegacyPassNameParser.h		diff \| blob \| history
llvm/include/llvm/Pass.h		diff \| blob \| history
llvm/include/llvm/PassInfo.h		diff \| blob \| history
llvm/lib/Analysis/CallGraphSCCPass.cpp		diff \| blob \| history
llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp		diff \| blob \| history
llvm/lib/CodeGen/CodeGenPrepare.cpp		diff \| blob \| history
llvm/lib/CodeGen/DetectDeadLanes.cpp		diff \| blob \| history
llvm/lib/CodeGen/DwarfEHPrepare.cpp		diff \| blob \| history
llvm/lib/CodeGen/EarlyIfConversion.cpp		diff \| blob \| history
llvm/lib/CodeGen/ExecutionDepsFix.cpp		diff \| blob \| history
llvm/lib/CodeGen/GCMetadata.cpp		diff \| blob \| history
llvm/lib/CodeGen/GCRootLowering.cpp		diff \| blob \| history
llvm/lib/CodeGen/GlobalMerge.cpp		diff \| blob \| history
llvm/lib/CodeGen/InterleavedAccessPass.cpp		diff \| blob \| history
llvm/lib/CodeGen/MIRPrintingPass.cpp		diff \| blob \| history
llvm/lib/CodeGen/MachineCombiner.cpp		diff \| blob \| history
llvm/lib/CodeGen/MachineFunctionPrinterPass.cpp		diff \| blob \| history
llvm/lib/CodeGen/RegAllocBasic.cpp		diff \| blob \| history
llvm/lib/CodeGen/RegAllocFast.cpp		diff \| blob \| history
llvm/lib/CodeGen/RegAllocGreedy.cpp		diff \| blob \| history
llvm/lib/CodeGen/RegAllocPBQP.cpp		diff \| blob \| history
llvm/lib/CodeGen/RegUsageInfoCollector.cpp		diff \| blob \| history
llvm/lib/CodeGen/RegUsageInfoPropagate.cpp		diff \| blob \| history
llvm/lib/CodeGen/RenameIndependentSubregs.cpp		diff \| blob \| history
llvm/lib/CodeGen/ResetMachineFunctionPass.cpp		diff \| blob \| history
llvm/lib/CodeGen/ShrinkWrap.cpp		diff \| blob \| history
llvm/lib/CodeGen/SjLjEHPrepare.cpp		diff \| blob \| history
llvm/lib/CodeGen/WinEHPrepare.cpp		diff \| blob \| history
llvm/lib/IR/LegacyPassManager.cpp		diff \| blob \| history
llvm/lib/IR/Pass.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64AddressTypePromotion.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64CollectLOH.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h		diff \| blob \| history
llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/AMDGPUOpenCLImageTypeLoweringPass.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/R600Packetizer.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIDebuggerInsertNops.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIInsertSkips.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIInsertWaits.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SITypeRewriter.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp		diff \| blob \| history
llvm/lib/Target/ARM/A15SDOptimizer.cpp		diff \| blob \| history
llvm/lib/Target/ARM/ARMAsmPrinter.h		diff \| blob \| history
llvm/lib/Target/ARM/ARMConstantIslandPass.cpp		diff \| blob \| history
llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp		diff \| blob \| history
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp		diff \| blob \| history
llvm/lib/Target/ARM/ARMOptimizeBarriersPass.cpp		diff \| blob \| history
llvm/lib/Target/ARM/MLxExpansionPass.cpp		diff \| blob \| history
llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp		diff \| blob \| history
llvm/lib/Target/ARM/Thumb2SizeReduction.cpp		diff \| blob \| history
llvm/lib/Target/BPF/BPFAsmPrinter.cpp		diff \| blob \| history
llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonAsmPrinter.h		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonGenExtract.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonGenInsert.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonGenMux.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonPeephole.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonVectorPrint.cpp		diff \| blob \| history
llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp		diff \| blob \| history
llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp		diff \| blob \| history
llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp		diff \| blob \| history
llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp		diff \| blob \| history
llvm/lib/Target/MSP430/MSP430BranchSelector.cpp		diff \| blob \| history
llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/Mips/Mips16HardFloat.cpp		diff \| blob \| history
llvm/lib/Target/Mips/MipsAsmPrinter.h		diff \| blob \| history
llvm/lib/Target/Mips/MipsConstantIslandPass.cpp		diff \| blob \| history
llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp		diff \| blob \| history
llvm/lib/Target/Mips/MipsHazardSchedule.cpp		diff \| blob \| history
llvm/lib/Target/Mips/MipsISelDAGToDAG.h		diff \| blob \| history
llvm/lib/Target/Mips/MipsLongBranch.cpp		diff \| blob \| history
llvm/lib/Target/Mips/MipsModuleISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/Mips/MipsOptimizePICCall.cpp		diff \| blob \| history
llvm/lib/Target/Mips/MipsOs16.cpp		diff \| blob \| history
llvm/lib/Target/NVPTX/NVPTXAllocaHoisting.cpp		diff \| blob \| history
llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h		diff \| blob \| history
llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h		diff \| blob \| history
llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp		diff \| blob \| history
llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp		diff \| blob \| history
llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp		diff \| blob \| history
llvm/lib/Target/NVPTX/NVPTXPeephole.cpp		diff \| blob \| history
llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp		diff \| blob \| history
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp		diff \| blob \| history
llvm/lib/Target/PowerPC/PPCBranchSelector.cpp		diff \| blob \| history
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/PowerPC/PPCQPXLoadSplat.cpp		diff \| blob \| history
llvm/lib/Target/Sparc/DelaySlotFiller.cpp		diff \| blob \| history
llvm/lib/Target/Sparc/LeonPasses.h		diff \| blob \| history
llvm/lib/Target/Sparc/SparcAsmPrinter.cpp		diff \| blob \| history
llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/SystemZ/SystemZAsmPrinter.h		diff \| blob \| history
llvm/lib/Target/SystemZ/SystemZElimCompare.cpp		diff \| blob \| history
llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp		diff \| blob \| history
llvm/lib/Target/SystemZ/SystemZLongBranch.cpp		diff \| blob \| history
llvm/lib/Target/SystemZ/SystemZShortenInst.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86AsmPrinter.h		diff \| blob \| history
llvm/lib/Target/X86/X86CallFrameOptimization.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86ExpandPseudo.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86FixupBWInsts.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86FixupLEAs.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86FixupSetCC.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86FloatingPoint.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86InstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86OptimizeLEAs.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86PadShortFunction.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86VZeroUpper.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86WinAllocaExpander.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86WinEHState.cpp		diff \| blob \| history
llvm/lib/Target/XCore/XCoreAsmPrinter.cpp		diff \| blob \| history
llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp		diff \| blob \| history
llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Transforms/IPO/FunctionImport.cpp		diff \| blob \| history
llvm/lib/Transforms/IPO/SampleProfile.cpp		diff \| blob \| history
llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp		diff \| blob \| history
llvm/lib/Transforms/Instrumentation/EfficiencySanitizer.cpp		diff \| blob \| history
llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp		diff \| blob \| history
llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp		diff \| blob \| history
llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp		diff \| blob \| history
llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp		diff \| blob \| history
llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp		diff \| blob \| history
llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp		diff \| blob \| history
llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp		diff \| blob \| history
llvm/lib/Transforms/Scalar/ConstantHoisting.cpp		diff \| blob \| history
llvm/lib/Transforms/Scalar/LoadCombine.cpp		diff \| blob \| history
llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp		diff \| blob \| history
llvm/lib/Transforms/Scalar/SROA.cpp		diff \| blob \| history
llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp		diff \| blob \| history
llvm/lib/Transforms/Scalar/StructurizeCFG.cpp		diff \| blob \| history
llvm/lib/Transforms/Utils/NameAnonGlobals.cpp		diff \| blob \| history
llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp		diff \| blob \| history
llvm/tools/opt/PassPrinters.cpp		diff \| blob \| history

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