[ARM][DAGCOMBINE][FIX] PerformVMOVRRDCombine
authorDiogo N. Sampaio <diogo.sampaio@arm.com>
Thu, 18 Jul 2019 10:05:56 +0000 (10:05 +0000)
committerDiogo N. Sampaio <diogo.sampaio@arm.com>
Thu, 18 Jul 2019 10:05:56 +0000 (10:05 +0000)
commit11512e742b283a2845f1afa6242c63efcd2ac102
treed4ebfac998cc9697973fa7b6f68eb6e59fb76c40
parent83748cc5abc199a5219b0e7d9ba308984a8df613
[ARM][DAGCOMBINE][FIX] PerformVMOVRRDCombine

Summary:
PerformVMOVRRDCombine ommits adding a offset
of 4 to the PointerInfo, when converting a
f64 = load[M]
to
{i32, i32} = {load[M], load[M + 4]}

Which would allow the machine scheduller
to break dependencies with the second load.

 - pr42638

Reviewers: eli.friedman, dmgreen, ostannard

Reviewed By: ostannard

Subscribers: ostannard, javed.absar, kristof.beyls, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64870

llvm-svn: 366423
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/test/CodeGen/ARM/pr42638-VMOVRRDCombine.ll [new file with mode: 0644]