drm/i915: Fix one wrong caching mode enum usage
authorTvrtko Ursulin <tvrtko.ursulin@intel.com>
Fri, 7 Jul 2023 12:55:03 +0000 (13:55 +0100)
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>
Tue, 11 Jul 2023 08:21:32 +0000 (09:21 +0100)
commit113899c2669dff148b2a5bea4780123811aecc13
tree9f6991e79eef5437546befa4a4b493e40b7fff29
parent6bf0961a008ac74b085f1690fba8520ac3b253ee
drm/i915: Fix one wrong caching mode enum usage

Commit a4d86249c773 ("drm/i915/gt: Provide a utility to create a scratch
buffer") mistakenly passed in uapi I915_CACHING_CACHED as argument to
i915_gem_object_set_cache_coherency(), which actually takes internal
enum i915_cache_level.

No functional issue since the value matches I915_CACHE_LLC (1 == 1), which
is the intended caching mode, but lets clean it up nevertheless.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Fixes: a4d86249c773 ("drm/i915/gt: Provide a utility to create a scratch buffer")
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230707125503.3965817-1-tvrtko.ursulin@linux.intel.com
(cherry picked from commit 49c60b2f0867ac36fd54d513882a48431aeccae7)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
drivers/gpu/drm/i915/gt/intel_gtt.c