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ASoC: fsl_xcvr: Add Counter registers
authorShengjiu Wang <shengjiu.wang@nxp.com>
Fri, 28 Oct 2022 07:03:47 +0000 (15:03 +0800)
committerMark Brown <broonie@kernel.org>
Fri, 28 Oct 2022 11:58:19 +0000 (12:58 +0100)
commit107d170dc46e14cfa575d1b995107ef2f2e51dfe
tree19f93bd69dac774e82856a64d259a3db50ffe4c6tree | snapshot
parentce992ff38e1ed495be202c22d065b42c942e0475commit | diff
ASoC: fsl_xcvr: Add Counter registers

These counter registers are part of register list,
add them to complete the register map

- DMAC counter control registers
- Data path Timestamp counter register
- Data path bit counter register
- Data path bit count timestamp register
- Data path bit read timestamp register

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1666940627-7611-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/fsl/fsl_xcvr.c diff | blob | history
sound/soc/fsl/fsl_xcvr.h diff | blob | history
Domain: System / Kernel;