[ARM] Add ARMISD::VLD1DUP to match vld1_dup more consistently.
authorEli Friedman <efriedma@codeaurora.org>
Wed, 14 Dec 2016 20:25:26 +0000 (20:25 +0000)
committerEli Friedman <efriedma@codeaurora.org>
Wed, 14 Dec 2016 20:25:26 +0000 (20:25 +0000)
commit10576e73c9a814d06cc86ff2b35ceae6dbc7af85
tree01602f6b70c2c310f4021604a93273b5f70c1873
parent43c8b6b7b2277e1ae07ca86ee58859a5aab6acc1
[ARM] Add ARMISD::VLD1DUP to match vld1_dup more consistently.

Currently, there are substantial problems forming vld1_dup even if the
VDUP survives legalization. The lack of an actual node
leads to terrible results: not only can we not form post-increment vld1_dup
instructions, but we form scalar pre-increment and post-increment
loads which force the loaded value into a GPR. This patch fixes that
by combining the vdup+load into an ARMISD node before DAGCombine
messes it up.

Also includes a crash fix for vld2_dup (see testcase @vld2dupi8_postinc_variable).

Differential Revision: https://reviews.llvm.org/D27694

llvm-svn: 289703
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/lib/Target/ARM/ARMISelLowering.h
llvm/test/CodeGen/ARM/vlddup.ll
llvm/test/CodeGen/ARM/vmul.ll