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(parent: f32c926) | patch
irqchip/gic-v3: Allow interrupts to be set as pseudo-NMI
authorJulien Thierry <julien.thierry@arm.com>
Thu, 31 Jan 2019 14:58:59 +0000 (14:58 +0000)
committerCatalin Marinas <catalin.marinas@arm.com>
Wed, 6 Feb 2019 10:05:21 +0000 (10:05 +0000)
commit101b35f7def1775bf589d86676983bc359843916
tree8e5b1665298bdf346243e8b5b21a6819f8814312tree | snapshot
parentf32c926651dcd1683f4d896ee52609000a62a3dccommit | diff
irqchip/gic-v3: Allow interrupts to be set as pseudo-NMI

Implement NMI callbacks for GICv3 irqchip. Install NMI safe handlers
when setting up interrupt line as NMI.

Only SPIs and PPIs are allowed to be set up as NMI.

Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
drivers/irqchip/irq-gic-v3.c diff | blob | history
Domain: System / Kernel;