Fix SIMD12 GT_STORE_LCL_FLD
authorBruce Forstall <Bruce_Forstall@msn.com>
Fri, 18 Jan 2019 01:10:24 +0000 (17:10 -0800)
committerBruce Forstall <Bruce_Forstall@msn.com>
Wed, 23 Jan 2019 03:09:27 +0000 (19:09 -0800)
commit0fa687ca0ea32e36c527322d1114c6500b55ce15
tree5a56f6aa35fde4c1a20d565e7b22852dfe807982
parenteca41b2123b21d887748528b83d4bfcffe1ac68f
Fix SIMD12 GT_STORE_LCL_FLD

It was ignoring the local field offset, by checking for the wrong
operator.

This appeared as a recent regression, but I couldn't find any code
(including test) change that would have caused this.

The failure only happens for JitStress with remorphing stress. This
creates the STORE_LCL_FLD. Otherwise, it looks like we normally
end up with IND(LCL_FLD_ADDR). Maybe we should be morphing these
somewhere?

No x64 PMI asm diffs in corelib or the JIT\SIMD tree. With JitStress=1
there are exactly 6 asm diffs in the Vector3Interop test, which was the
one failing.

The same fix is made for both xarch and arm64 code generators.

Fixes #21935
src/jit/codegenarm64.cpp
src/jit/simdcodegenxarch.cpp