dt-bindings: clock: meson8b: describe the embedded reset controller
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Fri, 28 Jul 2017 21:13:11 +0000 (23:13 +0200)
committerNeil Armstrong <narmstrong@baylibre.com>
Mon, 31 Jul 2017 08:48:39 +0000 (10:48 +0200)
commit0f9b973b65910eeb0f73bb1a2178bc0826a1b791
tree34729c881eec9b7df41e53f78cf4aafd009bb661
parent5771a8c08880cdca3bfb4a3fc6d309d6bba20877
dt-bindings: clock: meson8b: describe the embedded reset controller

The Amlogic Meson8/Meson8b/Meson8m2 clock controller provides some reset
lines. These are used for example to boot the secondary CPU cores.

This patch describes the reset controller which is embedded into the
clock controller on these SoCs.
A header file is provided which provides preprocessor macros for each
reset line (to make the .dts files easier to read).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt
include/dt-bindings/reset/amlogic,meson8b-clkc-reset.h [new file with mode: 0644]