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[MIR-Canon] Add support for rewriting VRegs that are typed but don't have an RC.
authorPuyan Lotfi <puyan@puyan.org>
Thu, 30 May 2019 18:06:28 +0000 (18:06 +0000)
committerPuyan Lotfi <puyan@puyan.org>
Thu, 30 May 2019 18:06:28 +0000 (18:06 +0000)
commit0f4446b2700a02612297bdb73a75a784a46d31bf
tree9ab4069b8d96e8e34a1026c7f12213b809b1b738tree | snapshot
parent50daaa5f6b2636578ac70ed08e0db246be3b95b8commit | diff
[MIR-Canon] Add support for rewriting VRegs that are typed but don't have an RC.

There were crashes (addrspace-memoperands.mir was only one of them) in MIR that
had operands that came from before register classes were set. With these
operands, creating a replacement vreg (for MIR-Canon's renaming) needs to use
the vreg type rather than the RegisterClass which is not present.

Differential Revision: https://reviews.llvm.org/D62543

llvm-svn: 362122
llvm/lib/CodeGen/MIRCanonicalizerPass.cpp diff | blob | history
llvm/test/CodeGen/MIR/AArch64/addrspace-memoperands.mir diff | blob | history
Domain: System / Toolchain;