crypto: qat - set COMPRESSION capability for DH895XCC
authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Thu, 7 Apr 2022 16:54:41 +0000 (17:54 +0100)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 15 Apr 2022 08:34:25 +0000 (16:34 +0800)
commit0eaa51543273fd0f4ba9bea83638f7033436e5eb
treea0c1b2305f0a6ab8fa71276e2caf7b72c65232ae
parent6a23804cb8bcb85c6998bf193d94d4036db26f51
crypto: qat - set COMPRESSION capability for DH895XCC

The capability detection logic clears bits for the features that are
disabled in a certain SKU. For example, if the bit associate to
compression is not present in the LEGFUSE register, the correspondent
bit is cleared in the capability mask.
This change adds the compression capability to the mask as this was
missing in the commit that enhanced the capability detection logic.

Fixes: cfe4894eccdc ("crypto: qat - set COMPRESSION capability for QAT GEN2")
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Marco Chiappero <marco.chiappero@intel.com>
Reviewed-by: Marco Chiappero <marco.chiappero@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c