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(parent: ff6b007) | patch
AMDGPU: Correct behavior of f16/i16 non-format store intrinsics
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 5 Aug 2019 14:57:59 +0000 (14:57 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 5 Aug 2019 14:57:59 +0000 (14:57 +0000)
commit0e0a1c80fb12e93fc92107346c9b65473ac261ef
tree62cde90121df32e3b089492b1ba1bcb6455797datree | snapshot
parentff6b00777215b66f79eae9b16a944aba40998461commit | diff
AMDGPU: Correct behavior of f16/i16 non-format store intrinsics

This was switching to use a format store for a non-format store for
f16 types. Also fixes i16/f16 stores on targets without legal f16.

The corresponding loads also need to be fixed.

llvm-svn: 367872
llvm/lib/Target/AMDGPU/BUFInstructions.td diff | blob | history
llvm/lib/Target/AMDGPU/SIISelLowering.cpp diff | blob | history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll diff | blob | history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.ll diff | blob | history
Domain: System / Toolchain;