gdb/riscv: Fix register access for register aliases
authorAndrew Burgess <andrew.burgess@embecosm.com>
Tue, 16 Oct 2018 21:40:09 +0000 (22:40 +0100)
committerAndrew Burgess <andrew.burgess@embecosm.com>
Tue, 23 Oct 2018 09:32:34 +0000 (10:32 +0100)
commit0dbfcfffe9abbc5198bce95eb8c66b6bc9b364be
tree389fd6bdc0b2f58914bfbdf59b28ea798ae5be33
parentba37fe2e8b13194a1ef216f4224d7521e748e1cf
gdb/riscv: Fix register access for register aliases

Some confusion over how the register names and aliases are setup in
riscv means that we currently can't access registers through their
architectural name.

This commit fixes this issue, and moves some of the csr register
handling out of the alias handling code and deals with it separately.
This has the benefit that we can now directly access some arrays
rather than having to iterate over them.

A new test is added to ensure that register aliases now work
correctly.

gdb/ChangeLog:

* riscv-tdep.c (riscv_gdb_reg_names): Update comment, and all
register names.
(struct register_alias): Rename to...
(struct riscv_register_alias): ...this, and update comment.
(riscv_register_aliases): Update type, and alias names.  Remove
CSR names from this list.
(riscv_register_name): Use riscv_gdb_reg_names for int and float
register names.  Add an extra assertion.
(riscv_is_regnum_a_named_csr): New function.
(riscv_register_reggroup_p): Use riscv_is_regnum_a_named_csr.

gdb/testsuite/ChangeLog:

* gdb.arch/riscv-reg-aliases.c: New file.
* gdb.arch/riscv-reg-aliases.exp: New file.
gdb/ChangeLog
gdb/riscv-tdep.c
gdb/testsuite/ChangeLog
gdb/testsuite/gdb.arch/riscv-reg-aliases.c [new file with mode: 0644]
gdb/testsuite/gdb.arch/riscv-reg-aliases.exp [new file with mode: 0644]