AMDGPU: Remove remnants of old address space mapping
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 31 Aug 2018 05:49:54 +0000 (05:49 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 31 Aug 2018 05:49:54 +0000 (05:49 +0000)
commit0da6350dc89670f415ac7939d607458b9dfb4089
treef27cf0a5f8b38d8c35886b7da7432e346f97487a
parente7ec083f198a828fc0052652d5f051208391d34b
AMDGPU: Remove remnants of old address space mapping

llvm-svn: 341165
89 files changed:
llvm/lib/Target/AMDGPU/AMDGPU.h
llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h
llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
llvm/lib/Target/AMDGPU/AMDGPUInline.cpp
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp
llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
llvm/lib/Target/AMDGPU/BUFInstructions.td
llvm/lib/Target/AMDGPU/FLATInstructions.td
llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
llvm/lib/Target/AMDGPU/R600Instructions.td
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
llvm/lib/Target/AMDGPU/SMInstructions.td
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
llvm/test/CodeGen/AMDGPU/alloca.ll
llvm/test/CodeGen/AMDGPU/call-return-types.ll
llvm/test/CodeGen/AMDGPU/combine_vloads.ll
llvm/test/CodeGen/AMDGPU/debug-value.ll
llvm/test/CodeGen/AMDGPU/debug-value2.ll
llvm/test/CodeGen/AMDGPU/debugger-emit-prologue.ll
llvm/test/CodeGen/AMDGPU/debugger-insert-nops.ll
llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
llvm/test/CodeGen/AMDGPU/env-amdgiz.ll
llvm/test/CodeGen/AMDGPU/env-amdgizcl.ll
llvm/test/CodeGen/AMDGPU/extload-align.ll
llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll
llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll
llvm/test/CodeGen/AMDGPU/fence-amdgiz.ll
llvm/test/CodeGen/AMDGPU/fence-barrier.ll
llvm/test/CodeGen/AMDGPU/frame-index-amdgiz.ll
llvm/test/CodeGen/AMDGPU/function-returns.ll
llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-debug-props.ll
llvm/test/CodeGen/AMDGPU/invalid-alloca.ll
llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
llvm/test/CodeGen/AMDGPU/load-global-i1.ll
llvm/test/CodeGen/AMDGPU/load-local-i1.ll
llvm/test/CodeGen/AMDGPU/load-local-i8.ll
llvm/test/CodeGen/AMDGPU/load-private-double16-amdgiz.ll
llvm/test/CodeGen/AMDGPU/memory-legalizer-store-infinite-loop.ll
llvm/test/CodeGen/AMDGPU/nullptr.ll
llvm/test/CodeGen/AMDGPU/promote-alloca-invariant-markers.ll
llvm/test/CodeGen/AMDGPU/r600.amdgpu-alias-analysis.ll
llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
llvm/test/CodeGen/AMDGPU/scratch-simple.ll
llvm/test/CodeGen/AMDGPU/setcc.ll
llvm/test/CodeGen/AMDGPU/sext-in-reg.ll
llvm/test/CodeGen/AMDGPU/shl.ll
llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
llvm/test/CodeGen/AMDGPU/sibling-call.ll
llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
llvm/test/CodeGen/AMDGPU/sra.ll
llvm/test/CodeGen/AMDGPU/store-global.ll
llvm/test/CodeGen/AMDGPU/store-local.ll
llvm/test/CodeGen/AMDGPU/trunc-vector-store-assertion-failure.ll
llvm/test/CodeGen/AMDGPU/unknown-processor.ll
llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
llvm/test/CodeGen/AMDGPU/vector-alloca.ll
llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll
llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll
llvm/test/tools/llvm-objdump/AMDGPU/source-lines.ll