drm/amd/display: Remove CR AUX RD Interval limit for LTTPR
authorGeorge Shen <George.Shen@amd.com>
Thu, 9 Dec 2021 01:28:14 +0000 (20:28 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Dec 2021 13:54:44 +0000 (08:54 -0500)
commit0d988e5de7aa5ee8865cbc664180ae67918a6b19
tree52a49a9a6bcd9798afa109a12a19057fae1adebf
parent3db817fce43ec3d423b969911151dd849f4d7351
drm/amd/display: Remove CR AUX RD Interval limit for LTTPR

[Why]
DP spec specifies that DPRX shall use the read interval in the
TRAINING_AUX_RD_INTERVAL_PHY_REPEATER LTTPR DPCD register. This
register's bit definition is the same as the AUX read interval register
for DPRX.

[How}
Remove logic which forces AUX read interval to 100us for repeaters when
in LTTPR non-transparent mode.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Wesley Chalmers <wesley.chalmers@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: George Shen <George.Shen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c