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(parent: 2949ae5) | patch
armv8/ls1043a: Implement workaround for PEX erratum A009929
authorMingkai Hu <Mingkai.hu@freescale.com>
Mon, 7 Dec 2015 08:58:54 +0000 (16:58 +0800)
committerYork Sun <yorksun@freescale.com>
Thu, 17 Dec 2015 00:52:18 +0000 (08:52 +0800)
commit0d6faf2bd0d12642e8b2c428d62c285f4ee28b9d
treefbc4357334745cbdccb55e406e147f8d8789cec8tree | snapshot
parent2949ae521200ae5758ae395a364fcb4e85f899c0commit | diff
armv8/ls1043a: Implement workaround for PEX erratum A009929

Consecutive write transactions from core to PCI express outbound
path hangs after 25 to 30 transactions depending on core freq.
This erratum enable the mbist clock through COP register setting.

Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
arch/arm/cpu/armv8/fsl-layerscape/soc.c diff | blob | history
arch/arm/include/asm/arch-fsl-layerscape/config.h diff | blob | history
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h diff | blob | history
Domain: System / Kernel;