clk: renesas: rcar-gen3: Allow changing the RPC[D2] clocks
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Fri, 27 Sep 2019 18:09:21 +0000 (21:09 +0300)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 20 Dec 2019 14:02:15 +0000 (15:02 +0100)
commit0d67c0340a60829c5c1b7d09629d23bbd67696f3
treecc7fd9d1dea43e9239d3c75460b22ea930dc9803
parent03975b72b4ac474f83edde145bcf152c7d2183cd
clk: renesas: rcar-gen3: Allow changing the RPC[D2] clocks

I was unable to get clk_set_rate() setting a lower RPC-IF clock frequency
and that issue boiled down to me not passing CLK_SET_RATE_PARENT flag to
clk_register_composite() when registering the RPC[D2] clocks...

Fixes: db4a0073cc82 ("clk: renesas: rcar-gen3: Add RPC clocks")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Link: https://lore.kernel.org/r/be27a344-d8bf-9e0c-8950-2d1b48498496@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/rcar-gen3-cpg.c