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(parent: 7d65957) | patch
clk: Add Allwinner A64 CLK driver
authorJagan Teki <jagan@amarulasolutions.com>
Sat, 22 Dec 2018 16:02:49 +0000 (21:32 +0530)
committerJagan Teki <jagan@amarulasolutions.com>
Fri, 18 Jan 2019 16:49:08 +0000 (22:19 +0530)
commit0d47bc70565102388c957ead7deac4b2eaa3dfba
treefb27c512d1340064464bc6aca8b46c5547b41d2ftree | snapshot
parent7d659573cef7f0333e4cab1916197160abff1455commit | diff
clk: Add Allwinner A64 CLK driver

Add initial clock driver for Allwinner A64.

Implement USB clock enable and disable functions for
OHCI, EHCI, OTG and USBPHY gate and clock registers
via ccu clk gate table.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
arch/arm/include/asm/arch-sunxi/ccu.h [new file with mode: 0644] blob
drivers/clk/Kconfig diff | blob | history
drivers/clk/Makefile diff | blob | history
drivers/clk/sunxi/Kconfig [new file with mode: 0644] blob
drivers/clk/sunxi/Makefile [new file with mode: 0644] blob
drivers/clk/sunxi/clk_a64.c [new file with mode: 0644] blob
drivers/clk/sunxi/clk_sunxi.c [new file with mode: 0644] blob
Domain: System / Kernel;