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(parent: 12f229e) | patch
fsl/ddr: Add workaround for ERRATUM_A009942
authorShengzhou Liu <Shengzhou.Liu@freescale.com>
Wed, 6 Jan 2016 03:26:51 +0000 (11:26 +0800)
committerYork Sun <york.sun@nxp.com>
Mon, 25 Jan 2016 16:24:14 +0000 (08:24 -0800)
commit0d3972cfcd6dff18d110d2ee01ad99e3623bfd45
treecf44538dad352ebcedef94d99a03c432f6d736e8tree | snapshot
parent12f229ea8f6c8e20f8fd07906eafc853c4c354a9commit | diff
fsl/ddr: Add workaround for ERRATUM_A009942

During the receive data training, the DDRC may complete on a
non-optimal setting that could lead to data corruption or
initialization failure.

Workaround: before setting MEM_EN, set DEBUG_29 register with
specific value for different data rates.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/include/asm/arch-fsl-layerscape/config.h diff | blob | history
drivers/ddr/fsl/fsl_ddr_gen4.c diff | blob | history
Domain: System / Kernel;