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[InstCombine] Teach SimplifyDemandedBits that udiv doesn't demand low dividend bits...
authorBenjamin Kramer <benny.kra@googlemail.com>
Wed, 9 May 2018 22:27:34 +0000 (22:27 +0000)
committerBenjamin Kramer <benny.kra@googlemail.com>
Wed, 9 May 2018 22:27:34 +0000 (22:27 +0000)
commit0d2fc1a501c7f4e3be014eadc0761941ac2995ff
tree68d88a60b2d352a1bd4112d8cfd1701f828435edtree | snapshot
parentb524d5e5537507f066f2fcdcb24b3be3c9a4c566commit | diff
[InstCombine] Teach SimplifyDemandedBits that udiv doesn't demand low dividend bits that are zero in the divisor

This is safe as long as the udiv is not exact. The pattern is not common in
C++ code, but comes up all the time in code generated by XLA's GPU backend.

Differential Revision: https://reviews.llvm.org/D46647

llvm-svn: 331933
llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp diff | blob | history
llvm/test/Transforms/InstCombine/udiv-simplify.ll diff | blob | history
Domain: System / Toolchain;