phy: qcom-qmp-ufs: Move HS Rate B register setting to tbls_hs_b
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Sat, 14 Jan 2023 07:10:03 +0000 (12:40 +0530)
committerVinod Koul <vkoul@kernel.org>
Tue, 17 Jan 2023 06:24:57 +0000 (11:54 +0530)
commit0cf7620e8e39a5b6c8707e3eb18f7d38c042dba7
treeb8281ebb828855298083a216ce2ed70375fc7ff2
parentbaf8d17e2cd1e73ca7c0a97224b3b6c934b879d4
phy: qcom-qmp-ufs: Move HS Rate B register setting to tbls_hs_b

Since now there is support for configuring the HS Rate B mode properly,
let's move the register setting to tbls_hs_b struct for all SoCs.

This allows the PHY to be configured in Rate A initially and then in
Rate B if requested by the UFS driver.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20230114071009.88102-7-manivannan.sadhasivam@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c