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[Tizen] Implement ASan wrapper for Linux ARM32
authorVyacheslav Cherkashin <v.cherkashin@samsung.com>
Wed, 16 Jun 2021 13:19:36 +0000 (16:19 +0300)
committerGleb Balykov <g.balykov@samsung.com>
Tue, 27 Sep 2022 12:50:22 +0000 (15:50 +0300)
commit0c89701aeadfcaf0764d644edc418001af5647ca
treeb9760d16eb26a3c137700e736d46a8b4552692c2tree | snapshot
parent94c3b5b1f5c8e1487b8e488d315eca1942810244commit | diff
[Tizen] Implement ASan wrapper for Linux ARM32

This commit implements wrappers that allow interception transitions
from managed to external unmanaged code (CIL -> native) and back
(native -> CIL). This allows enable/disable ASan during transitions.
Due to this, we sanitize only external code, which allows us to
achieve acceptable performance.

Signed-off-by: Vyacheslav Cherkashin <v.cherkashin@samsung.com>
Signed-off-by: Slava Barinov <v.barinov@samsung.com>
src/coreclr/vm/CMakeLists.txt diff | blob | history
src/coreclr/vm/arm/stubs.cpp diff | blob | history
src/coreclr/vm/arm/tizenasanenv.S [new file with mode: 0644] blob
src/coreclr/vm/dllimport.cpp diff | blob | history
src/coreclr/vm/tizenasanenv.cpp [new file with mode: 0644] blob
src/coreclr/vm/tizenasanenv.h [new file with mode: 0644] blob
Domain: Dotnet / Core;