powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb
authorPriyanka Jain <Priyanka.Jain@freescale.com>
Tue, 8 Feb 2011 07:43:15 +0000 (13:13 +0530)
committerKumar Gala <galak@kernel.crashing.org>
Mon, 4 Apr 2011 14:24:42 +0000 (09:24 -0500)
commit0c871e952e77fe9f3b88d52778d2b5d82da4d884
tree9b68a642ac0646d9260a2488abef330597c2d5c1
parentf098c9c880f08c7b090a4c5bcb924eef1663a32e
powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb

Using DDR as RAMBOOT base instead of L2SRAM for SDCard and SPI Flash
boot loaders because:
- P1_P2_RDB boards have soldered DDR so no need for SPD
- Also P102x has 256K L2 cache size so becomes a limiting factor for
  size of image that could be loaded in SRAM mode and would require three
  stage boot loader (TPL).

Changes done:
 1. CONFIG_SYS_TEXT_BASE to 0x11000000
 2. CONFIG_RESET_VECTOR_ADDRESS to 0x1107fffc

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
board/freescale/p1_p2_rdb/ddr.c
board/freescale/p1_p2_rdb/tlb.c
include/configs/P1_P2_RDB.h