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(parent: 06a09dc) | patch
dt-bindings: pci: add PHY properties to Armada 7K/8K controller bindings
authorMiquel Raynal <miquel.raynal@bootlin.com>
Wed, 31 Jul 2019 12:21:21 +0000 (14:21 +0200)
committerKishon Vijay Abraham I <kishon@ti.com>
Tue, 27 Aug 2019 06:07:09 +0000 (11:37 +0530)
commit0c79cf1f486135929f4370b6d919be0facdc1c8e
treeb8ec5962bc102a3d97b25a87f261414072558d08tree | snapshot
parent06a09dc318e4ee91be630a99dc7cd6b92aa44d3dcommit | diff
dt-bindings: pci: add PHY properties to Armada 7K/8K controller bindings

Armada CP110 PCIe controller can have from one to four PHYs for
configuring SERDES lanes (PCIe x1, PCIe x2 or PCIe x4). Describe the
phys and phy-names properties in the bindings.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Documentation/devicetree/bindings/pci/pci-armada8k.txt diff | blob | history
Domain: System / Kernel;